libdragon
|
00001 00006 #ifndef __LIBDRAGON_REGSINTERNAL_H 00007 #define __LIBDRAGON_REGSINTERNAL_H 00008 00030 typedef struct AI_regs_s { 00032 volatile void * address; 00036 uint32_t length; 00039 uint32_t control; 00041 uint32_t status; 00046 uint32_t dacrate; 00048 uint32_t samplesize; 00049 } AI_regs_t; 00050 00055 typedef struct MI_regs_s { 00057 uint32_t mode; 00059 uint32_t version; 00061 uint32_t intr; 00063 uint32_t mask; 00064 } MI_regs_t; 00065 00070 typedef struct VI_regs_s { 00072 uint32_t control; 00074 void * framebuffer; 00076 uint32_t width; 00080 uint32_t v_int; 00082 uint32_t cur_line; 00084 uint32_t timing; 00086 uint32_t v_sync; 00088 uint32_t h_sync; 00090 uint32_t h_sync2; 00092 uint32_t h_limits; 00094 uint32_t v_limits; 00096 uint32_t color_burst; 00098 uint32_t h_scale; 00100 uint32_t v_scale; 00101 } VI_regs_t; 00102 00107 typedef struct PI_regs_s { 00109 volatile void * ram_address; 00111 uint32_t pi_address; 00113 uint32_t read_length; 00115 uint32_t write_length; 00117 uint32_t status; 00118 } PI_regs_t; 00119 00124 typedef struct SI_regs_s { 00126 volatile void * DRAM_addr; 00128 volatile void * PIF_addr_read; 00130 uint32_t reserved1; 00132 uint32_t reserved2; 00134 volatile void * PIF_addr_write; 00136 uint32_t reserved3; 00138 uint32_t status; 00139 } SI_regs_t; 00140 00145 typedef struct SP_regs_s { 00147 volatile void * RSP_addr; 00149 volatile void * RDAM_addr; 00151 uint32_t rsp_read_length; 00153 uint32_t rsp_write_length; 00155 uint32_t status; 00157 uint32_t rsp_dma_full; 00159 uint32_t rsp_dma_busy; 00161 uint32_t rsp_semaphore; 00162 } SP_regs_t; 00163 00164 #endif