Mixing CPU and SP Data

In the previous chapter it was implied that CPU and SP data should be in separate segments as they are addressed differently. This is not mandatory, however, as the addressing can be easily reconciled. Suppose the application defines a display list and includes it in a segment given a CPU addressable KSEG0 address.

The physical address of this display list can be easily determined with the OS_K0_TO_PHYSICAL (3P) macro or the osVirtualToPhysical (3P) routine. The resulting physical address corresponds to an SP address with segment number if 0, and a segment offset equal to the physical address. This is because the encoding of the SP segment address is as follows:

If the application creates a mapping using segment 0 to a beginning physical address of 0x0, the SP can correctly access objects in DRAM when given a physical address. This simplifies the situation somewhat, but the SP microcode takes it a step further: Since the upper four bits of a segment address are not used, they are ignored. Thus an implicit mapping is done from a KSEG0 address to a physical address, and no explicit conversion need be done by the application.

To summarize, as long as an SP segment table mapping is done from segment number 0 to offset 0, CPU KSEG0 addresses can be interpreted correctly by the SP.

Copyright © 1999 Nintendo of America Inc. All Rights Reserved Nintendo and N64 are registered trademarks of Nintendo Last Updated January, 1999