SP Addressing

The SP microcode makes address references also, but these references are only to the local memory (IMEM and DMEM) on the chip. With the current software architecture, the application does not program the SP directly, and need not concern itself with IMEM and DMEM accesses.

DRAM references, however, concern the application, because large data structures stored in DRAM are passed by reference. These include matrices, vertex lists, textures, and the display lists themselves. As for the CPU, the addresses given to be SP for these data objects are also virtual addresses, but the mapping from virtual to physical address is significantly different. The SP microcode maintains 16 locations in DMEM that act as segment base registers. An “SP virtual” address is presented to the SP microcode in the form of a <segment number, segment offset> pair encoded into a 32-bit word. To compute a physical DRAM address, the microcode adds the contents of the corresponding segment base register to the given offset.

Copyright © 1999 Nintendo of America Inc. All Rights Reserved Nintendo and N64 are registered trademarks of Nintendo Last Updated January, 1999