al - Audio Library Functions gDP - DP GBI Macros gdSP - General GBI Macros gSP - SP GBI Macros gt - Turbo Microcode RDP gu - Graphics Utilities Math - Math Functions nuSys - NuSystem os - N64 Operating System sp - Sprite Library Functions uh - Host to Target IO 64DD - N64 Disk Drive
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osPiStartDmaSyntax#include <ultra64.h> s32 osPiStartDma(OSIoMesg *mb, s32 priority, s32 direction, u32 devAddr, void *vAddr, u32 nbytes, OSMesgQueue *mq);Explanation The osPiStartDma, osPiWriteIo, osPiReadIo, osCreatePiManager, and osPiGetCmdQueue functions provide managed access to the parallel (or peripheral) interface (PI). The PI is responsible for the transport of data between RDRAM and bulk-storage devices (BSD) such as ROM, RAM, CD-ROM, and other technologies. These functions provide "managed" control of the PI; they provide synchronization and mutual exclusion support when the PI is to be shared for simple peripheral IO. The use of these PI routines require that the operating system be correctly initialized. The osPiStartDma routine sets up a DMA transfer between RDRAM and the PI device address space by sending an IO message block request (mb) to the PI manager. The caller specifies various parameters to be included in the request block such as direction, device address (devAddr), RDRAM address vAddr, nbytes of transfer, and message queue (mq) to receive the notification from PI manager once the IO operation is finished. If the requested priority is OS_MESG_PRI_HIGH (the default is OS_MESG_PRI_NORMAL), osPiStartDma jams the message to the front of PI manager's command queue. Otherwise, it appends the message to the end of the queue. If the PI manager has not been started, osPiStartDma returns -1. Otherwise, it returns the status of either osSendMesg or osJamMesg. The length count (nbytes) is the number of bytes to transfer (up to 16 megabytes) and must be a multiple of 2 bytes. The PI device address (devAddr) must be 2-byte aligned. The RDRAM virtual address (vAddr) must be 8-byte aligned, but for OS_READ DMA operations, a stricter alignment is recommended. See OS_DCACHE_ROUNDUP_ADDR for a description of the problems that can occur when transfers are not an integral number of cache lines. Notes Nintendo strongly recommends that you use these high-level functions to manage PI access rather than using the raw, low-level functions. Be very careful when intermixing low-level (raw, unmanaged access) and high-level (managed access) PI functions. Without proper synchronization, this mix can cause an error in the PI because the PI can only support one IO operation at any one time. See Also osPiWriteIo osPiReadIo osPiGetCmdQueue osCreatePiManager osPiRawStartDma osSendMesg osJamMesg
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