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osWritebackDCache osWritebackDCacheAll

Syntax

#include <ultra64.h>
void osWritebackDCache(void *vaddr, s32 nbytes);
void osWritebackDCacheAll(void);


Explanation
They write back CPU data-cache lines to physical memory.

The MIPS R4300 CPU implements an 8-kilobyte direct-mapped data cache with a line size of 16 bytes. The cache implements a "write back" replacement policy which means that data stores are held in the cache until the entire cache line is written back, usually due to a cache miss that requires the same cache line. The cache is not coherent with respect to physical memory and thus cache lines must be explicitly written back when you want the DRAM updated with the more recent data in the data cache.

The osWritebackDCache call writes back all data cache lines that contain the region [vaddr, vaddr + nbytes). The given address vaddr must be a CPU virtual address, either direct mapped or mapped by way of the CPU TLB. If vaddr is not aligned to the a cache line boundary, and nbytes is not a multiple of the cache line size, a slightly larger region may be written back to memory.

The osWritebackDCacheAll routine writes back all cached locations to physical memory.

This routine is most frequently used in the situation where a direct memory access (DMA) device needs to read physical memory locations, but current contents associated with these memory locations are currently stored in the cache. In this case, the memory is out of date with respect to the cache, and the cache lines associated with these locations must be written back prior to performing the DMA operation.

See Also
osMapTLB
osInvalDCache
osInvalICache



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Copyright © 1998
Nintendo of America Inc. All rights reserved
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Last updated March 1998